GENSO: A Genetic Algorithm-based Optimization Framework for Lifetime Reliability Enhancement in Sequential Circuit Design
نویسندگان
1 School of Electrical and Computer Engineering, Shiraz University, Shiraz, Iran.
2 School of Electrical and Computer Engineering, Shiraz University, Shiraz, Iran.
3 School of Engineering Science at Simon Fraser University, Canada.
4 School of Electrical and Computer Engineering, Shiraz University, Shiraz, Iran.
doi
10.22075/mseee.2025.37658.1212چکیده
Chnology scaling becomes increasingly aggressive, lifetime reliability has emerged as a critical challenge for modern digital circuits, exacerbated by manufacturing process variations and aging effects. This paper introduces GenSO, a Genetic algorithm-based multi-objective Sequential circuit Optimization framework designed to enhance the lifetime reliability of sequential circuits modeled as Finite State Machines (FSMs), while simultaneously addressing initial delay and power consumption. The framework leverages a cross-layer approach, utilizing a gate-level delay degradation model that accounts for process variations and aging to estimate circuit lifetime reliability. A novel metric, termed Guardband-Aware Reliability (GAR), is proposed to provide a fair assessment of FSM lifetime reliability in relation to the guardband and timing yield specified by the designer. A multi-objective genetic algorithm is then employed to optimize delay, power consumption, and lifetime reliability in FSM-based sequential circuits. Experimental results demonstrate that GenSO successfully identifies non-dominated solutions for sequential circuit designs, achieving simultaneous optimization of initial delay, power consumption, and lifetime reliability. With a 15% delay overhead for a 6-year lifetime and a 10% variation ratio, GenSO improves circuit reliability by an average of 64.34%, significantly outperforming state-of-the-art reliability optimization frameworks, which typically achieve less than 30% improvement in lifetime reliability.