Minimum Power Miller-Compensated CMOS Operational Ampli ers

نویسندگان
Yahya, A. ID 1
Mahmud, N. ID 2
Baharom, A. ID 3
Andromeda, T. ID 4
Hisham Khamis, N. ID 5

1 Faculty of Biosciences & Medical Engineering, Universiti Teknologi Malaysia, 81310 UTM Johor Bahru, Johor, Malaysia

2 Faculty of Biosciences & Medical Engineering, Universiti Teknologi Malaysia, 81310 UTM Johor Bahru, Johor, Malaysia

3 Faculty of Electrical Engineering, Universiti Teknologi Malaysia, 81310 UTM Johor Bahru, Johor, Malaysia.

4 Department of Electrical Engineering, Diponegoro Universiti, Jalan Prof. H Soedharto, Tembalang, Semarang, 50275, Indonesia

5 Faculty of Electrical Engineering, Universiti Teknologi Malaysia, 81310 UTM Johor Bahru, Johor, Malaysia

doi
چکیده

A new approach for the design of two-stage Miller-compensated CMOS op amps is presented. The paper studies the basic relations between power consumption, unity-gain bandwidth, biasing region, technology parameters, and the external capacitive load. As a result, simple and ecient design guides are provided to achieve the minimum possible power consumption for the given speci cations and for short-channel devices. It is shown that the conventional design proce- dures do not always result in minimum power op amps. The presented results are also veri ed by Spectre simulations.

کلیدواژه‌ها
Design optimization, gain-bandwidth product (GBW), Miller compensation, op amp, phase margin, stability